Advantech PCI-1710 Manual do Utilizador

Consulte online ou descarregue Manual do Utilizador para Hardware Advantech PCI-1710. Advantech PCI-1710 User Manual Manual do Utilizador

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PCI-1710/1710HG
Multifunction DAS Card for
PCI Bus
User's manual
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Resumo do Conteúdo

Página 1 - User's manual

PCI-1710/1710HGMultifunction DAS Card forPCI BusUser's manual

Página 2 - On-line Technical Support

6 PCI-1710 /1710HG User's ManualAnalog Output:• Channels: 2• Resolution: 12-bit• Relative accuracy: ±1/2 LSB• Gain error: ±1 LSB• Maximum update

Página 3 - Contents

Chapter 1 General Information 7Programmable Timer/Counter• Counter chip: 82C54 or equivalent• Counters: 3 channels, 16 bits, 2 channels are per

Página 4

8 PCI-1710 /1710HG User's Manual1.4 Block DiagramFigure 1-1: PCI-1710/PCI-1710HG block diagramPCI ControllerAddress Decoder16-bit Digital Outpu

Página 5 - General Information

Chapter 2 Installation 92 InstallationCHAPTER

Página 6 - 1.1 Introduction

10 PCI-1751/1710HG User's Manual2.1 Initial InspectionBefore installing the PCI-1710/1710HG, check the card for visibledamage. We have careful

Página 7 - 1.2 Features

Chapter 2 Installation 112.3 Installation InstructionsThe PCI-1710/1710HG can be installed in any PCI slot in thecomputer. However, refer to t

Página 8 - 1.3 Specifications

12 PCI-1751/1710HG User's Manual

Página 9

Chapter 3 Signal Connections 133 Signal ConnectionsCHAPTER

Página 10 - Digital Output:

14 PCI-1710/1710HG User's Manual3.1 OverviewCorrect signal connections are one of the most important factors inensuring that your application s

Página 11 - General:

Chapter 3 Signal Connections 15Figure 3-1: I/O connector pin assignments for the PCI-1710/1710 HG cardAI0AI2AI4AI6AI8AI10AI12AI14AIGNDDA0_REFDA

Página 12 - 1.4 Block Diagram

CopyrightThis documentation and the software included with this product arecopyrighted 1998 by Advantech Co., Ltd. All rights are reserved.Advantech C

Página 13 - Installation

16 PCI-1710/1710HG User's ManualI/O Connector Signal DescriptionsSignalNameReference Direction DescriptionAI<0…15> AIGND InputAnalog Inpu

Página 14 - 2.2 Unpacking

Chapter 3 Signal Connections 17I/O Connector Signal Descriptions (part II)Signal Name Reference Direction DescriptionDI<0..15> DGND Input

Página 15 - 2.3 Installation Instructions

18 PCI-1710/1710HG User's ManualI/O Connector Signal Descriptions (part III)SignalNameReference Direction DescriptionPACER_OUTDGND OutputPacer

Página 16

Chapter 3 Signal Connections 193.3 Analog Input ConnectionsThe PCI-1710/1710HG card supports either 16 single-ended or 8differential analog inp

Página 17 - Signal Connections

20 PCI-1710/1710HG User's ManualFigure 3-2: Single-ended input channel connectionDifferential Channel ConnectionsThe differential input configu

Página 18 - 3.2 I/O Connector

Chapter 3 Signal Connections 21card. With this connection, the PGIA rejects a common-mode voltageVcm between the signal source and the PCI-171

Página 19

22 PCI-1710/1710HG User's ManualFigure 3-4: Differential input channel connection - floating signal sourceHowever, this connection has the disa

Página 20

Chapter 3 Signal Connections 23Figure 3-5: Analog output connections3.4 Analog Output ConnectionsThe PCI-1710/1710HG card provides two D/A outp

Página 21

24 PCI-1710/1710HG User's Manual3.5 Trigger Source ConnectionsInternal Pacer Trigger ConnectionThe PCI-1710/1710HG card includes one 82C54 comp

Página 22

Chapter 3 Signal Connections 253.6 Field Wiring ConsiderationsWhen you use the PCI-1710/1710HG card to acquire outside data,environmental noise

Página 23 - 3.3 Analog Input Connections

ContentsChapter 1: General Information ... 11.1 Introduction ...

Página 24 - ExternalInternal

26 PCI-1710/1710HG User's Manual

Página 25

Chapter 4 Register Structure and Format 274Register Structureand FormatCHAPTER

Página 26

28 PCI-1710/1710HG User's Manual4.1 OverviewThe PCI-1710/1710HG is delivered with an easy-to-use 32-bit DLLdriver for user programming under th

Página 27 - 3.4 Analog Output Connections

Chapter 4 Register Structure and Format 29Table 4-1: PCI-1710/1710HG register format (Part 1)BaseAddress+ decimalRead76543210Channel Number and

Página 28

30 PCI-1710/1710HG User's ManualBaseAddress+ decimalRead76543210N/A1514Digital Input17 DI15 DI14 DI13 DI12 DI11 DI10 DI9 DI816 DI7 DI6 DI5 DI4

Página 29

Chapter 4 Register Structure and Format 31BaseAddress+ decimalWrite76543210Software A/D Trigger10A/D Channel Range Setting32S/DB/UG2G1G0MUX Con

Página 30

32 PCI-1710/1710HG User's ManualBaseAddress+ decimalWrite76543210D/A Reference Control1514DA1_I/E DA1_5/10 DA0_I/E DA0_5/10Digital Output17 DO1

Página 31 - Register Structure

Chapter 4 Register Structure and Format 334.3 Channel Number and A/D Data BASE+0 and BASE+1These two bytes, BASE+0 and BASE+1, hold the result

Página 32 - 4.2 I/O Port Address Map

34 PCI-1710/1710HG User's Manual4.5 A/D Channel Range Setting BASE+2Each A/D channel has its own input range, controlled by a range codestored

Página 33

Chapter 4 Register Structure and Format 35PCI-1710Gain Input Range(V) B/UGain CodeG2 G1 G01 -5 to +5 00002 -2.5 to +2.5 0 0 0 14 -1.25 to +1.25

Página 34 - Counter 0

4.7 Control Register... 394.8 Status Register ...

Página 35

36 PCI-1710/1710HG User's ManualPCI-1710HGGain Input Range(V) B/UGain CodeG2 G1 G01 -5 to +5 000010 -0.5 to +0.5 0 0 0 1100 -0.05 to +0.05 0 0

Página 36

Chapter 4 Register Structure and Format 374.6 MUX ControlBASE+4 and BASE+5Table 4.6: The register for multiplexer controlCL3 ~ CL0 Start Scan

Página 37 - BASE+0 and BASE+1

38 PCI-1710/1710HG User's Manualthe stop channel and then repeat. The following examples show thescan sequences of the MUXs (all channels are s

Página 38 - BASE+2 S/D B/U G2 G1 G0

Chapter 4 Register Structure and Format 39differential, and AI14 is differential, then the scan sequence is AI11,AI12, AI14, AI11, AI12, AI14,

Página 39 - PCI-1710

40 PCI-1710/1710HG User's ManualGATE External trigger gate function enable bitSet 1 to enable external trigger gate function, and set 0 to d

Página 40 - PCI-1710HG

Chapter 4 Register Structure and Format 41F/H FIFO Half-full flagThis bit indicates whether the FIFO is half-full. 1 means that the FIFOis

Página 41 - BASE+4 CL3 CL2 CL1 CL0

42 PCI-1710/1710HG User's Manual4.10 D/A Output Channel 0  BASE+10and BASE+11The write-only registers of BASE+10 and BASE+11 accept data forD/

Página 42

Chapter 4 Register Structure and Format 434.12 D/A Reference Control BASE+14The write-only register of BASE+14 allows users to set the D/Arefe

Página 43 - 4.7 Control Register  BASE+6

44 PCI-1710/1710HG User's Manual4.13 Digital I/O Registers  BASE+16and BASE+17The PCI-1710/1710HG card offers 16 digital input channels and 16

Página 44 - BASE+7 IRQ F/F F/H F/E

Chapter 5 Calibration 455 CalibrationCHAPTER

Página 45 - BASE+8 Clear Interrupt

Chapter 1 General Information 11General InformationCHAPTER

Página 46

46 PCI-1710/1710HG User's Manual5.1 IntroductionRegular calibration checks are important to maintain accuracy in dataacquisition and con

Página 47 - 4.12 D/A Reference Control 

Chapter 5 Calibration 47 The following list shows the function of each VR:VR FunctionVR1 A/D unipolar offsetVR2 A/D bipolar offsetVR3 A/D full sca

Página 48 - BASE+28 and BASE+30

48 PCI-1710/1710HG User's Manual5.4 D/A CalibrationIn a way similar to the ADCAL.EXE program, the DACAL.EXEprogram leads you through the

Página 49 - Calibration

Chapter 5 Calibration 495.5 Self A/D CalibrationUnder many conditions, it is difficult to find a good enough DCvoltage source for A/D calibration.

Página 50 - 5.2 VR Assignment

50 PCI-1710/1710HG User's Manual

Página 51 - 5.3 A/D Calibration

Appendix A 8524 Counter Chip Functions 51A82C54 Counter ChipFunctionsAPPENDIX

Página 52 - 5.4 D/A Calibration

52 PCI-1750 User's ManualA.1 The Intel 82C54The PCI-1710/1710HG uses one Intel 82C54 compatible programma-ble interval timer/counter chi

Página 53 - 5.5 Self A/D Calibration

Appendix A 8524 Counter Chip Functions 53A.2 Counter Read/Write andControl RegistersThe 82C54 programmable interval timer uses four registers atad

Página 54

54 PCI-1750 User's ManualRW1 & RW0 Select read/write operationOperation RW1 RW0Counter latch 0 0Read/write LSB 0 1Read/write MSB 1 0

Página 55 - Functions

Appendix A 8524 Counter Chip Functions 55becomes:BASE + 30(Dec) 82C54 control, read-back modeBit D7 D6 D5 D4 D3 D2 D1 D0Value 1 1 CNTSTAC2C1C0XCNT

Página 56 - A.1 The Intel 82C54

2 PCI-1710 /1710HG User's Manual1.1 IntroductionThe PCI-1710/1710HG is a multifunction DAS card for the PCI bus.Advanced circuit design brings

Página 57 - Control Registers

56 PCI-1750 User's ManualA.3 Counter Operating ModesMODE 0  Stop on Terminal CountThe output will initially be low after you set this m

Página 58

Appendix A 8524 Counter Chip Functions 57The gate input, when low, will force the output high. When the gateinput goes high, the counter will star

Página 59 - Value 1 1 CNTSTAC2C1C0X

58 PCI-1750 User's ManualA.4 Counter OperationsRead/Write OperationBefore you write the initial count to each counter, you must firstspe

Página 60 - A.3 Counter Operating Modes

Appendix A 8524 Counter Chip Functions 59Counter Latch OperationUsers often want to read the value of a counter without disturbing thecount in pro

Página 61

60 PCI-1750 User's Manual

Página 62 - A.4 Counter Operations

Chapter 1 General Information 3On-board Programmable CounterThe PCI-1710/1710HG provides a programmable counter for generat-ing a pacer trigger

Página 63 - Counter Latch Operation

4 PCI-1710 /1710HG User's Manual1.3 SpecificationsAnalog Input:• Channels: 16 single-ended or 8 differential (software programma-ble)• Resoluti

Página 64

Chapter 1 General Information 5• Maximum data throughput:PCI-1710: 100 kHzPCI-1710HG: (variable, depending on PGIA settling time)PCI-1710HGGa

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