
Advantech SOM-Express Design Guide
Chapter 5 Carrier Board Design Guidelines 41
5.1.2 Design Guidelines
5.1.2.1 Differences among PCI Slots
Most PCI signals are connected in parallel to all the slots (or devices). The
exceptions are the following pins from each slot or device:
Table 5.2 Carrier PCI Slots
IDSEL : Connected (through resistor) to a different AD line for each slot.
CLK : Connected to a different SOM-Express PCI clock signal for each slot.
INTA# ~ INTD# : Connected to a different SOM-Express interrupt signal for each slot.
REQ# : Connected to a different SOM-Express request signal for each slot, if used.
GNT# : Connected to a different SOM-Express grant signal for each slot, if used.
Each signal connects differently for each of the four possible slots or devices as
summarized in the following PCI Slots/Devices Table 5.3
Table 5.3 Carrier PCI Slots/Devices Interrupt Routing Table
SOM-EXPRESS PCI Slot 0 PCI Slot 1 PCI Slot 2 PCI Slot 3
AD20
( Pin D39)
IDSEL - - -
AD21
( Pin C42)
- IDSEL - -
AD22
( Pin D40)
- - IDSEL -
AD23
( Pin C43)
- - - IDSEL
INTA#
( Pin C49)
INTA# INTB# INTC# INTD#
INTB#
( Pin C50)
INTB# INTC# INTD# INTA#
INTC#
( Pin D46)
INTC# INTD# INTA# INTB#
INTD#
( Pin D47)
INTD# INTA# INTB# INTC#
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